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Defect of the Month

Bob Willis

Is the board preheat process optimized?

This month we look at incomplete fill of plated through-holes. During any soldering operation a balance of flux and solder/paste chemistry and soldering temperatures creates good and reliable joints. In FIGURE 1 the solder has not filled the hole completely but still exceeds the requirements of IPC-A-610, class 2 of 50%; measured, it may be 75% filled.

 

 

 

 

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Bob Willis

Soldering excursions can lead to visual process indicators.

This month we look at cracks in plated through-holes around the knee of the hole. FIGURE 1 shows very small via holes that were subjected to multiple lead-free soldering steps, then underwent thermal cycling with no failures but a little cracking.

The cracks visible in the microsection were found on via holes not after the initial two reflow steps and wave-soldering test boards, but after further temperature cycling at -55o +125oC. No electrical failures were detected, just the impact of repeated stressing of the copper. It is a good demonstration of how reliable a board can be, but all that stress does have some visual impact. Care must be taken during microsection preparation to see these indicators.

 

 

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Bob Willis

When BGAs move during reflow, intermittent shorts can result.

This month we look at ball grid array (BGA) opens and solder compression. Intermittent joints and shorts can be caused by package warpage at elevated temperatures. Hence the interest in lowering soldering temperatures commonly used for SAC alloys.

FIGURE 1 was part of an experiment to chart the movement of a BGA package during reflow soldering. Using our reflow simulation, we can see solder ball compression by the package laminate in the image. In many of our video experiments, we see package warpage causes solder shorts and open connections during second reflow. Intermittent open connections have been experienced on double-sided reflow and package rework of adjacent parts. This procedure has been helpful to demonstrate why and how this problem can exist, particularly with smaller packages.

 

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Bob Willis

AOI during fabrication will catch most pad shorts caused by etching.

This month we look at etching faults on PCBs. This is no ordinary set of pads. They are for an 01005 chip capacitor, the second-smallest chip component available. (Yes, there is an even-smaller size.) The 01005 component package is approximately 0.016" by 0.008" or 0.4mm by 0.2mm and small enough for most members of your staff.

Unfortunately, we found small copper shorts between the two mounting pads on one of our test boards that were not picked up during fabrication. The defective boards were spotted during printing trials. The nickel and gold plating are also present. As with many copper shorts, this is related to bare board etching and imaging, but they should have been picked up earlier.

 

 

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Bob Willis

Gold boards are susceptible to the defect.

This month we look at solder spotting, which is often seen after first- or double-sided reflow, most commonly on gold boards. The two examples below illustrate what happens. FIGURE 1a shows two spots on a nickel/gold pad, and FIGURE 1b shows one spot on a copper OSP pad finish.

 

 

 

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Bob Willis

As-supplied component residues are often the culprit.

This month we look at dewetting on the surface of solder mask or components in manufacture.

FIGURES 1 and 2 show the impact of dewetting on the surface of plastic components in conformal coating. Figure 2 illustrates dewetting on solder mask. In both cases if the coating does not cover all the critical areas of the assembly, it must be reworked. It is up to the quality and design departments to agree what level, if any, of dewetting is acceptable to the product and the customer, rather than just quoting a standard. In some cases, the position or level of the problem may not affect the product operation or reliability.

 

 

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