Screen Printing

Clive Ashmore

Not sure how to tackle an alignment issue? These tips might help set you straight.

In today’s slang, a “life hack” is any trick, shortcut, or proven workaround for a given task that increases productivity and efficiency. And, as regular readers will be acutely aware, this column’s focus is all about improving printing productivity and efficiency. So, I thought a series of “screen-printing hacks” might be helpful to engineers, no matter the level of experience. Throughout 2020, this space will periodically delve into various screen-printing hacks; an issue central to a good print outcome will be identified, and I’ll cover some ways to get the process back on track if something goes awry. The first installment of our screen-printing hack series is alignment.

The goal for the printing process is 100% alignment; the solder paste must align with the feature (the pad) on the substrate. When the solder paste inspection (SPI) system indicates this is not the case and offsets (paste not centered on the pad) are present, an alignment issue is most likely the culprit. Where do you start? Here’s a list of the most common causes and potential fixes; i.e., hacks:

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Clive Ashmore

Achieving printing nirvana is largely dependent on solder paste material, print speed and deposit release.

Ahhhhh … screen printing utopia. We process engineers strive for this existence. In a perfect process, printed solder paste would emerge from the stencil as exact replicas of the aperture shape: nice, flat, brick-like deposits. And, while modern printers and advanced materials get us close, solder paste is still, well, solder paste. The materials are not inks; they have a grain structure that is getting smaller in size and distribution and is suspended in flux. Try as we might, with these particles, there will be material undulation at best, and flat paste surfaces will likely never be a certainty.

With printing, we must be pragmatic. It’s not a digital process, and many variables come into play. The goal, of course, is to fill all the apertures on the stencil fully with solder paste to obtain the best deposit shape and volume possible. This is easier said than done, as the range of aperture sizes across a stencil can be broad, with 1mm square, 300µm and 200µm openings next to one another. Each of those apertures – from the very large to the very small – must be filled. Since printing with different thickness stencils is a nonstarter (generally and practically speaking), compromise is required, and that challenges our utopian ideal. Squeegee pressure, stencil thickness, print speed and separation speed must be balanced to accommodate variations in required deposit sizes. When all inputs aren’t optimized and in perfect balance, solder deposit shape differences can have the potential to introduce process problems. Known in the printing world as “dog ears” on square or rectangular deposits and “witch hats” on circular deposits (FIGURE 1), these solder paste deposit peaks may be defect bugbears, especially in the world of high-density, miniaturized assemblies.

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Clive AshmoreHow proper investigative work can alleviate misguided print process adjustments.

Printing is arguably one of the most sensitive processes within the entire PCB assembly operation. Not surprisingly, stencil printing’s multi-input interdependency and sensitivity have become more pronounced as miniaturization has taken hold. Even slight variations can cause process shifts, a reality our team was reminded of while conducting recent internal testing.

Our engineers set up a test with a really long board run to evaluate time to bridge, a fairly standard analysis used to understand how many PCBs can be printed for a particular product until solder paste bridging begins to appear. The evaluation, which was performed using a relatively complex ASM test board, was proceeding beautifully until we noticed a sudden shift in the output. The measurable Sigma shift went from a process running at 4 Sigma (1.33 Cpk) to 3 Sigma (1.0 Cpk). The engineer running the evaluation was looking at the process window and robustness, beginning at a 10,000 ft. view with a box plot, which gives reasonable stability insight across the entire run. When a more granular examination of the data was conducted, the data spike appeared on three boards in the batch, with one PCB being more extreme.

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Clive AshmoreWhich holds up better: mesh-mounted or mechanically tensioned, mesh-free frames?

Ah, stencil tension. A subject near and dear to my heart and one I’ve written about before in this space. In fact, we covered the subject a few years back, when we discussed how the loss of tension on a conventional mesh-mounted stencil can adversely impact printing results and why other solutions may prove superior. In recent years, studies undertaken to evaluate the impact of stencil tension on print performance have, indeed, confirmed these assumptions.

Before we get into the outcomes of our company’s work, let’s review the basics of conventional mesh-mounted frame stencils and mechanically tensioned, mesh-free frame systems. To be fair, mesh-mounted stencils are the industry standard. They are the predominant stencil type employed for electronics assembly. The alternative approach is mechanically tensioned, single-frame solutions that allow manufacturers to use one frame alongside multiple foils for various assemblies.

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Clive AshmoreWhen it comes to components, the devil’s in the details.

The interdependency of all elements of stencil printing to achieve a high-yield result can be overwhelming. When you consider just the things we’ve addressed in this column – from tooling to warped boards to stencil tension to solder paste types and everything in between – it’s clear controlling the printing process is a balancing act that takes a fair level of expertise (or at least a robust self-learning system!). Nothing underscored this reality more than a recent experience with a customer.

When printing a relatively high-mix board that contained a range of components from 01005s to large QFNs, the customer was experiencing different results from the front and rear print strokes. One direction printed relatively well. But the reverse direction left smearing on the stencil and, according to SPI results, non-optimal paste transfer efficiency. The assembler tried troubleshooting the issue, but nothing seemed to work, other than applying different print pressures on the front and rear strokes in order to get the same output from the process. This, of course, is not normal for solder paste printing.

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Clive AshmoreAccommodating for warped boards.

The current consumer electronics manufacturing climate, which dictates thinner boards and stencils, component placements right to the very edge and panelized assemblies with a significant amount of routing, makes it increasingly challenging to ensure board flatness and coplanarity for a good stencil printing outcome. But, as you know from reading this column regularly, one fact is nonnegotiable: Good printing results require a tight stencil-to-board gasket across the whole of the panel. (See “For Successful Printing, Don’t Blow the Gasket,” October 2018.) This requires the PCB to be flat.

Board warpage – or bow and twist, as I like to refer to it – has always been a key consideration for stencil printing. However, in the past, the 2mm-thick boards being processed were more likely to arrive from the fabricator flat and remain that way through topside printing, reflow and bottom-side printing. The occasional bowed panel was easy to rectify with over-the-top clamps and a good tooling vacuum. Today, however, as consumer PCBs have become thinner, with more routing (interspace) around the supporting panel, warpage is a far more common and vexing issue. Smaller, higher-functioning consumer products have moved us toward 0.6mm-thick boards and stencils as thin as 80µm (and thinner). This combination of factors is making PCB bow and twist increasingly likely and its traditional remedy less than ideal in isolation. Any interspace created during the printing process introduces the opportunity for defects not only with board-to-board repeatability, but also within the panelized PCB from corner-to-corner and side-to-side.

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