Features Articles

Mark FinstadFlex circuits can run 10+Gb/s signals, but many factors need to be met.

Can flex circuit boards run 10+Gb/s signals? Answer: Multiple factors must be juggled to successfully run signals that are 1Gb/s and above on flexible circuitry. I will address each of them individually.

Controlled impedance. Just like any high-speed rigid PCB, a successful high-speed flex design will have to incorporate a target characteristic impedance. To do so, match the characteristic impedance of the flex to the rest of the system to ensure minimal reflections and crosstalk. This can have negative consequences for mechanical performance, however. Elevated impedance requirements typically equate to thicker dielectrics, thereby making the circuit much less flexible.

The impedance value of a circuit is driven primarily by the signal trace width, the layer-to-layer spacing between signal trace and reference plane, and the dielectric constant (Dk) of the insulating material between the signal and plane. For most flexible-circuit manufacturers, yields start to drop when trace widths fall much below 0.003" (0.0762mm), so any significant trace width reduction beyond that can have a hefty cost impact. Also, traces under 0.005" are fragile and may develop cracks in tight bend-radius applications.

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Martin WickmanIs it the mask, or is it the gold-plating underneath?

Peelable masking has been used in the past to protect gold key pads during soldering or from solder spitting during reflow, which leads to solder wetting spots on some terminals. This, in turn, may be a cosmetic issue, but also may affect the operation of the contacts.

In FIGURE 1, the peelable coating reflects poor adhesion of the gold to the surface of the pads. This problem is related to the preparation of the contact pads prior to gold or nickel plating and was not related to the assembly process or mask. Testing for gold adhesion using IPC methods showed a total lack of adhesion of the plating.

 

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Whether round or rectangle, HDI will be required to meet the needs of next-generation semiconductor nodes.

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Mike BuetowCan the electronics industry influence global trade pacts with China? And should it? The word from many major trade groups appears to be “yes” and “maybe not.”

IPC, SEMI, the Semiconductor Industry Association and National Association of Manufacturers have each commented of late on the proposed tax hikes to be levied by the US on Chinese imports in response to concerns over China’s technology transfer policies and the massive trade imbalance between the world’s two largest economies.

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John BornemanAs most readers know, statistical tests calculate a mean and confidence intervals on the mean. We are all familiar with the fact that as our sample size decreases, our knowledge of the “true” mean becomes less and less certain. This is important for tests that use the mean, such as the t-test and ANOVA.

FIGURE 1 is an example of two data sets: “apples” and “oranges.” In the first experiment we had 15 samples of apples and 15 samples of oranges. Plotting the means with their calculated confidence intervals shows we cannot differentiate between apples and oranges. (Since the confidence intervals overlap, we cannot be certain both means are not equal.)

 

 

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Clive AshmoreWhy print offsets occur and how to correct them.

Printing offsets – the degree to which a material deposit is off center from the pad – can occur due to three primary elements of printing: the printed circuit board (substrate), the stencil and the printer. Each has to be manufactured and is surrounded by a process bandwidth, each with its own tolerances that can accumulate. Add to this the variables from different manufacturing methods, sites and base materials and, well, offset inevitability becomes obvious.

Let’s begin with the board and stencil. Gerber data is king; it’s where the designs begin and is the blueprint for PCB and stencil manufacture. Simply put, Gerber is an x, y coordinate and angle for a certain feature size and shape. When an offset occurs, it is the difference between what the Gerber says and what is actually produced. At the PCB level, the offsets derive from the artwork, the subtractive chemical process and the FR-4 laminate. Each of these has the potential for variability, as in the case of FR-4 that can stretch and move during temperature processing, because the coefficient of thermal expansion (CTE) is relatively poor, especially considering today’s dimensions. Given these realities, the board could be off in one corner, or it could be a gradual movement from the left corner to the right, from the center outward or just focused in one area of the board.

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