SINGAPORE – In a recent FutureScape report, IDC FutureScape: Worldwide Future of Work 2024 Predictions — Asia/Pacific (Excluding Japan) Implications, IDC predicts that by 2025, 60% of A2000 firms will upgrade hardware and software technologies to increase worker retention with personalized work experiences and enhanced collaboration by 2025. Collaborative applications are becoming more visual and will continue to develop characteristics not unlike a multiplayer game that enables a more personalized view of work and teams, better alignment to projects, and hands-on collaboration applications.

• Generative AI emerges as a game-changer for organizational advancement, weaving a seamless tapestry across three key fronts: Intelligent Document Processing (IDP), Generative Automation, and Knowledge Sharing.
• Smarter Document Handling: By 2026, businesses that link GenAI to smart document handling will discover 20% more ways to use it, boosting productivity, scalability, and delivering better customer experiences.
• Generative Automation: Business teams using code generation copilots will achieve 70% success rate in streamlining jobs with task/workflow automation, replacing low-code and IT-supported development by 2024.
• Efficient Knowledge Sharing: In 2025, GenAI tools will enable senior leaders to double the productive use of unstructured data by discovering untapped insights and knowledge, driving 20% growth in sustainable business benefits.

As GenAI takes center stage, its adaptive capabilities are set to streamline processes, automate tasks, and redefine the skillsets required for various roles. While this evolution brings forth unprecedented opportunities for upskilling and reskilling, it also underscores the imperative for organizations to adapt to this paradigm shift, ensuring the alignment of talent with the dynamic demands of the future workplace.

This prediction not only foretells a redefined professional landscape but also emphasizes the pivotal role of GenAI in driving organizational agility and competitiveness. In this dynamic environment, the significance of skill development cannot be overstated, as it becomes the essence of staying competitive and relevant. GenAI is not just a technological advancement but a catalyst for change in the skill landscape. The imperative for skill development is no longer a choice but a necessity in a landscape where GenAI is reshaping how we work.

• Job Evolution: By 2027, 40% of current job roles will be redefined or eliminated across A2000 organizations accelerated by GenAI adoption.
• Tailored Skills Boost: Enterprises will leverage personalized technology skills development to drive $1 trillion in productivity gains by 2027, enabled by GenAI and automation everywhere.
• Tech Skill Support: By 2027, 80% of A1000 organizations will mitigate technical skills shortages using digital adoption platforms.
• AR/VR engineering and training: By 2028, half of large businesses will use prompt engineering to prototype AR/VR simulations, reducing development time from weeks to hours and creating precision training.

Simultaneously, digital twins and sustainable office design are capturing attention, reflecting a growing focus on environmental consciousness in the region. Organizations are recalibrating priorities to balance technological innovation with a commitment to sustainability, showcasing a harmonious approach where cutting-edge technology aligns with ecological stewardship in APEJ's business narrative.

• Digital Twins Maturity: By 2028, digital twin technologies will enhance virtual and physical office user experiences, driving a 30%+ improvement in retention of workers in A1000 companies.
• Green Offices: By 2028, half of the biggest companies are set to invest in what we call "Climate Heavens" for their offices. This means using things like assets and renewable energy to cover 30% of their ongoing operating costs, making workplaces more eco-friendly.

"As the benefits and applicable use cases of GenAI unfold, organizations are exploring the outcomes that GenAI can potentially bring to business operations and innovation. The focus on skill development becomes a necessity and a strategic imperative, as GenAI enables personalized development. Simultaneously, the reimagination of workplaces, with digital twins and sustainability stand out as key foci for companies," says Dr . Lily Phan, Research Director, Future of Work, IDC Asia/Pacific.

KISTA, SWEDEN – HANZA has decided to build a new factory section of 8,800 square meters in Töcksfors, Sweden. The new facility is a new and extension of HANZA's existing production facility in Töcksfors and will provide new areas for assembly in particular. The reason is a continued long-term good demand.

"This investment supports our concept of complete, regional manufacturing and creates a very strong offering in the manufacturing cluster Sweden," says Erik Stenfors, CEO of HANZA.

"We have a continuous increase in demand from many of our successful customer partnerships, such as the return management company Tomra, the heat pump company Thermia and Väderstad, which is one of the world's leading companies in tillage and seeding," says Morgan Sahlin, cluster manager in Sweden. "This is a significant investment for HANZA Sweden that makes it possible to follow our customers' needs."

Occupation of the new factory is planned for the turn of the year 2024/2025. In addition to the investment of SEK 75 million, the project includes specific investments in the machine park to support the increased assembly capacity.

The expansion will contribute positively to HANZA's sustainability work with energy efficiency improvements. In the new building, geothermal heat pumps will be installed to handle heating in both the new and existing premises, which means major energy savings.

HANZA has recently increased its capacity for circuit board manufacturing in Sweden through the acquisition of Orbit One with a factory in Ronneby.

CAMBRIDGE, UK – Semiconductor packaging technologies have evolved from initial 1D PCB levels to the cutting-edge 3D hybrid bonding packaging at the wafer level. This advancement facilitates single-digit micronmeter interconnecting pitches, achieving over 1000 GB/s bandwidth with high energy efficiency.

Four critical parameters shape advanced semiconductor packaging: power, performance, area, and cost:

1. Power: Enhancing power efficiency through innovative packaging technologies.
2. Performance: Boosting bandwidth and reducing communication length by shortening interconnection pitch for more input/output (I/O) points.
3. Area: Larger packaging area required for chips used in high performance computing areas, whereas smaller z-form factor are required for 3D integration.
4. Cost: Continuously reducing packaging costs by employing alternative, more affordable materials or enhancing manufacturing equipment efficiency

2.5D and 3D packaging technology:

The 2.5D and 3D packaging technologies encompass various packaging techniques.

In 2.5D packaging, the choice of interposer material categorizes it into Si-based, Organic-based, and glass-based interposers, as illustrated in the figure above. Meanwhile, in 3D packaging, the evolution of microbump technology aims for smaller pitch dimensions. However, achieving single-digit pitch dimensions today is made possible through the adoption of hybrid bonding technology, a method that directly connects Cu-Cu, signifying a significant advancement in the field.

Advantages and drawbacks of each packaging type in both 2.5D and 3D configurations

2.5D

Si: There are two alternatives within this category: Si interposer, utilizing a full passive Si wafer, and Si bridge, which can take the form of a localized Si bridge in a fan-out based molding compound or in a substrate with a cavity. The Si interposer, commonly employed in 2.5D packaging for high-performance computing integration due to its ability to facilitate the finest routing features, faces challenges associated with its cost in both materials and manufacturing compared to alternatives like organic materials, and the packaging area limitation. To address this, the localized Si bridge form is gaining prominence, strategically utilizing Si where fine features are essential. Additionally, the Si bridge structure is expected to see increased use, particularly in scenarios where Si interposer faces limitations in area, pushing beyond the 4x or 5x reticle limit.

Organic: In the report, we specifically consider organic-based packaging that utilizes a fan-out molding compound rather than an organic substrate. Organic materials, with the capability to adjust their dielectric constant lower than silicon, contribute to lower RC delay in the package. Moreover, these materials present a more cost-effective alternative to silicon. These advantages drive the emergence of organic-based 2.5D packaging. However, a key drawback lies in the challenges associated with achieving the same level of interconnect feature reduction as Si-based packages.

Glass: The glass-based approach has gained significant interest following Intel's unveiling of its glass-based test vehicle package earlier this year. Glass possesses advantageous properties, including tunable Coefficient of Thermal Expansion (CTE), high dimensional stability, and a smooth, flat surface. These characteristics position glass as a promising candidate for serving as an interposer, with routing features that have the potential to rival those offered by silicon. However, the main drawback of glass lies in its immature ecosystem and a current lack of large-volume mass production capability in the packaging industry. Nevertheless, as the ecosystem matures and production capabilities advance, the use of glass-based technologies in semiconductor packaging may see further growth.

3D

Microbump: The well-established microbump technology, based on the Thermal Compression Bonding (TCB) process, has a longstanding presence across diverse products. Its roadmap involves ongoing scaling of bumping pitch. However, a critical challenge emerges as smaller solder ball sizes in this process result in heightened Intermetallic Compounds (IMCs) formation, diminishing conductivity and mechanical properties. Additionally, close contact gaps may lead to solder ball bridging, risking chip failure during reflow. With solder and IMCs exhibiting higher resistivity than copper, their use in high-performance component packaging faces limitations.

Hybrid bonding: Hybrid bonding involves creating permanent interconnections by combining a dielectric material (SiO2) with embedded metal (Cu). With Cu-Cu hybrid bonding achieving pitches below 10 micrometers (typically around one-digit µm), advantages include expanded I/O, increased bandwidth, enhanced 3D vertical stacking, heightened power efficiency, and reduced parasitics and thermal resistance due to the absence of underfill. Challenges encompass manufacturing complexities and higher costs associated with this advanced technique.

IDTechEx’s new report, "Advanced Semiconductor Packaging 2024-2034: Forecasts, Technologies, Applications", thoroughly explores the latest innovations in semiconductor packaging technology, covering key technical trends, analyzing the value chain, evaluating major players, and providing detailed market forecasts.

The report recognizes the crucial role of advanced semiconductor packaging as the foundation for next-generation ICs. It focuses on its applications in key markets such as AI and data centers, 5G, autonomous vehicles, and consumer electronics. Leveraging IDTechEx's expertise in these sectors, the report delivers a comprehensive understanding of the impact and future trajectory of advanced semiconductor packaging in these critical fields.

CLINTON, NY – Two Indium Corporation experts are set to deliver technical presentations on low-temperature soldering at the upcoming Pan Pacific Strategic Electronics Symposium (Pan Pac), hosted by SMTA, January 29–February 1 in Hawaii.

At 1 p.m. local time on January 30, R&D Manager of the Alloy Group and Principal Research Metallurgist Dr. HongWen Zhang will deliver a presentation on the challenges of lower temperature soldering for large ball grid array, board-level assembly. The presentation will explore the challenges of heterogeneous integration in semiconductor circuits and address the associated package size issues by testing low-to-mid-temperature solder pastes. The study emphasizes the importance of sufficient molten solder volume for forming defect-free joints, particularly under conditions of component-level warpage.

At 2:45 p.m. local time on January 30, Senior Technologist Dr. Ronald Lasky will present on the status of low-temperature solders by summarizing the current totality of research on them and attempting to predict their future applications and implementations. Dr. Lasky will also review current low-temperature alternatives to tin-bismuth solders that have performance similar to SAC solder.

As manager of the alloy group in Indium Corporation’s R&D department, Dr. Zhang’s focus is on the development of the varieties of Pb-free solder materials and the associated technologies for low-temperature, high-temperature, and/or high-reliability applications. He was instrumental in inventing the Durafuse® technology to combine the merits of constituents to improve wetting, reduce processing temperatures, modify the bonding surface, and control the joint’s morphology, thus improving reliability. As principal metallurgist, he is also responsible for expanding metallurgical innovation. He and his team are responsible for using metallurgical insight to develop new products, implement improvements to existing processes and products, and measure results.

Dr. Zhang has a bachelor’s degree in metallurgical physical chemistry, a master’s degree in mechanical engineering, and a Ph.D. in material science and engineering. He has a Six Sigma Green Belt from the Thayer School of Engineering at Dartmouth College, and is a certified IPC Specialist for IPC-A-600 and IPC-A-610, as well as a certified SMT Process Engineer. Dr. Zhang has published two book chapters and more than 50 conference and journal papers, and he has been granted more than ten patents in the U.S. and globally. Dr. Zhang was awarded the Surface Mount Technology Association’s (SMTA) Technical Distinction Award in 2023.

Dr. Lasky is a senior technologist at Indium Corporation, as well as a professor of engineering at Dartmouth College and a Lean Six Sigma Black Belt Instructor. He has more than 30 years of experience in electronics and optoelectronics packaging at IBM, Universal Instruments, and Cookson Electronics. He has authored six books and contributed to several others on science, electronics, and optoelectronics; he has authored numerous technical papers. Additionally, he has served as an adjunct professor at several colleges, teaching more than 20 different courses on topics such as electronics packaging, materials science, physics, mechanical engineering, and science and religion.

Dr. Lasky holds numerous patent disclosures and is the developer of several SMT processing software products relating to cost estimating, line balancing, and process optimization. He is the co-creator of engineering certification exams that set standards in the electronics assembly industry worldwide. Dr. Lasky was awarded the Surface Mount Technology Association’s (SMTA) Technical Distinction Award in 2021 for his “significant and continuing technical contributions to the SMTA.” He was also awarded SMTA’s prestigious Founder’s Award in 2003.