Void size and location can predict future failures.

Perhaps quad flat packages are not as fashionable a package choice as they once were because of their limited I/Os compared to BGAs, but they continue to be a staple in electronics (FIGURE 1). As such, they are still a source of problems to assemblers. With their typical gull wing joint style, located on the outside of the package rather than beneath it, these devices can be inspected optically. This can identify some issues that may arise but, as with other packages, if you can’t see the problem optically, it does not mean it is not there! Therefore, x-ray inspection of QFPs can complement any optical inspection, not only by helping confirm issues raised optically, but also providing wider fault coverage through identifying and helping mitigate a range of optically invisible issues that QFPs can provide.

Figure 1. X-ray image of QFP from the top down.

Solder paste escaping gaps in underfill can cause electrical failures.

Welcome to our latest Defect of the Month. This month we illustrate what can happen with area array packages that have been underfilled during rework.

During any rework, it is important to avoid overheating components on the opposite side of the board or adjacent to the parts being reworked. If solder joints surrounded by underfill undergo reflow, or are close to reflow temperatures, the solder will expand/extrude, then flow under pressure through any openings (FIGURE 1). (We have captured solder reflow in underfill during reflow simulation in x-ray investigations for a customer at Dage.) Voids in the underfill or gaps caused by expansion of the component can result in joints becoming intermittent. Such joints can fail at any time during the product’s life.

Simple fixes are often the best solution for small variances.

In a perfect world, manufacturing process setup should eliminate the potential for mistakes. In practice, however, process complexity and the impact of system variation makes that impossible. Consequently, organizations committed to the efficiencies of Lean manufacturing often use a range of tools to identify and eliminate defect opportunities from their process.

SigmaTron International’s Tijuana, Mexico, facility uses a number of these tools in this process. During project launch, advanced product quality planning (APQP) failure mode and effects analysis (FMEA) is used to set up the most efficient, defect-free process. The product part approval process (PPAP) is used on automotive projects to validate the process, while customer-specific validation processes are used for projects in other industries. Once production is ongoing, statistical process control (SPC) and other forms of quality data collection and monitoring are utilized to monitor processes and track defects. When defects occur, a kaizen event is scheduled, and tools such as 8D problem-solving, Six Sigma’s Define-Measure-Analyze-Improve-Control (DMAIC) and poka yoke are applied to analyze and correct the root cause.

Are we headed toward Singularity? Or just more PowerPoints?

Thus says IPC:

The Hermes Standard Initiative is happy and glad to announce that IPC has confirmed to recognize The Hermes Standard to be the successor to “the SMEMA Standard” IPC-SMEMA-9851, which has been the only globally accepted and broadly established standard for machine to machine communication in SMT with regard to PCB handover. Accordingly, The Hermes Standard was assigned an IPC naming code: It can now officially be referred to as IPC-HERMES-9852.

This strong acknowledgment means a lot for further enhancements of the global footprint and acceptance of The Hermes Standard. With The Hermes Standard having shown an impressively fast start from early drafts to worldwide awareness, it is now entering the second stage in global market penetration.