June 2011 cover



Cover Story
Benefits and Challenges of 3D Semiconductor Packaging
By integrating multiple die elements within a single package outline, overall product functionality has increased and been made smaller than their predecessors, improving both performance and capability. Assembly of semiconductor die onto a substrate is essentially the same as those used for standard IC packaging in lead frames; however, substrate-based IC packaging for 3D applications can adopt a wider range of materials, and several alternative processes may be used in their assembly.
by Vern Solberg

Component Placement
The Effect of Placement Yield on Rework Costs
Calculating rework and scrap cost is relatively straightforward, provided the production line’s first-pass yield is known. Knowing how pick-and-place accuracy can impact post-assembly costs, however, can be an invaluable benchmark, as this study of cost as a function of various yield rates and line capacity shows.
by Sjef van Gastel

Using Automated SPI to Qualify SMT Stencil Suppliers
The goal of stencil printing can be summed in one simple phrase: Get the right amount of solder paste in the right spot – every time. And the right stencil starts with the right supplier, but with all the options in metals, manufacturing processes, frame styles and price, selecting a stencil vendor can be a considerable task.
by Chrys Shea



  • Caveat Lector
    Standard problems.
    Mike Buetow



    • ROI
      Ensuring onshoring.
      Peter Bigelow

    • Focus on Business
      Talk, talk, talk.
      Susan Mucha



  • Screen Printing
    A new summer coat.
    Clive Ashmore

  • Test and Inspection
    A choice of options?
    Jun Balangue

  • Process Doctor
    Equipped for success.
    Dr. Harald Wack

  • Getting Lean
    JIT vs. inventory, revisited.
    Todd Baggett

  • Technical Abstracts
    In Case You Missed It.

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