Venture Development Corp. (VDC, Natic, MA), a technology market research firm, and Circuits Assembly (Atlanta, GA), a UP Media Group publication, are launching a multi-client market research study analyzing global market opportunities for 3-D chip scale packaging solutions.

This research program, based on extensive telephone interviews with suppliers, integrators and other 3-D packaging market participants, will include: detailed market definitions and segmentations; 3-D packaging technology descriptions; engineering approaches (such as thermal or power management); market estimates and forecasts across product categories and application segments; analysis of current and future applications; original equipment manufacturer (OEM)/integrator requirements and preferences; competitive position of 3-D packaging component and solution suppliers; and key success strategies.

3-D chip scale packaging refers to the vertical (z-axis) stacking of multiple die within a package, or multiple packages, using specialized substrates and interconnects. Driven in large part by wireless application markets, 3-D chip scale packaging solutions will play a vital role in meeting performance and size requirements for future generations of mobile electronics. As portable products become smaller, lighter and more feature-rich, the vertical stacking techniques employed in 3-D chip scale packaging solutions will provide tremendous value by building on and exceeding package miniaturization efforts to date, allowing increased functionality and reliability on the system level. 

Lisa Hamburg Bastin, editor-in-chief of Circuits Assembly, said, "Although 3-D chip scale packaging exceeds many performance demands and looks promising, there are still challenges that lie ahead such as cost and integration issues. We are excited to team with VDC to find answers to these issues and create a roadmap for the industry."

Rick Barnard, practice director of VDC's Electronic Components and Advanced Materials group, said, "As the technology landscape becomes more mobile-oriented and time-to-market challenges increase, system designers are faced with finding the optimal combination of form and function. This study will address important issues surrounding the 3-D chip scale packaging opportunity by providing a granular, relevant market analysis with technical and developmental considerations."

Circuits Assembly's assistance will enhance the contents and scope of the report, based on its knowledge of 3-D chip scale packaging trends, business opportunities in the global market place and innovations and technological developments in the industry; and bolster VDC's primary research program by queuing its proprietary database with VDC's research tools.

Interim findings from the analysis will be shipped in July 2004; the completed report will be delivered in August 2004. The pre-publication price of the report is $4,450.

To view the full proposal, visit: http://www.vdc-corp.com/components/reports/04/br04-10.pdf.

For more information about "3D Chip Scale Packaging Solutions: A Global Market Assessment," contact Marc Regberg, senior vice president: (508) 653-9000 x111; msr@vdc-corp.com.

www.vdc-corp.com

www.circuitsassembly.com

Copyright 2004, UP Media Group. All rights reserved.