How squeegee technology is driving new high-speed printing solutions.

Read more ...

Why board stretch makes printing tight panels like nailing jelly to a wall.

Recently our company developed some new test printed circuit boards that push the boundaries of today’s technology. These boards – very similar to what one would imagine a smartphone board would look like – are four-up, panelized 250 x 120mm boards packed with several leading-edge components, including metric 0201s and 0.25mm CSPs. As a process engineer who thrives on future technologies, this is really exciting stuff for me.

As our team was developing the print program for these little gems, we weren’t getting anywhere fast in terms of alignment. With features this small, there is absolutely no room for error, and the tolerances for the board and the stencil leave little wiggle room. Add in inevitable board stretch (discussed in a previous column) and, well, it was an exercise much like nailing jelly to a wall: it just wouldn’t stick. One part of the board would be absolutely bulls-eye, but then panel #4 would be out of alignment. When panel #4 was acceptable, then panels #2 and #3 were off. Why? Because there is this blasted thing called Theta!
In my experience, most customers just want to focus on standard x and y alignment. In all fairness, for larger pitches like 0.4mm CSPs, aligning for x and y is usually fine. But, with these highly miniaturized devices, rotation absolutely has to be factored in to accommodate for the ultra-fine pitches and board stretch (and sometimes stencil stretch as well). Using x and y only probably won’t get you there, and that’s certainly what we found with our new test boards. To address the challenge, we used a three fiducial capture software functionality. Using three fiducials, even though it may take a bit more time, ensures true triangulation because three points are now known. There is much better alignment and better rotational alignment as well. The minor time sacrifice will be worth it in the end.

Three fiducials, however, probably won’t be the end of the alignment story with finer-featured devices, and you’ll still be hammering away at that jelly. For this product, all the alignment options in our print platform’s software had to be used. In addition to three fiducial capture, we relied on experience with semiconductor printing and the technique used for wafer bumping. The rule with wafer bumping is to first sort out the rotation and not worry about x and y. If there is any mismatch of the artwork on the board to the stencil, find a happy medium where everything is off by the same amount. Once that’s done and rotation is defined, it’s a simple case of dialing it in to x and y. Too often, process engineers will try to do x and y and then rotation or, worse still, all of it together.

Of course, there may be the case where the board stretch is just too great and simply cannot be properly aligned to the stencil, particularly with highly miniaturized devices. In fact, robust SPC tools can flag boards that are outside of tolerance. The software takes data from the fiducial capture, measures board stretch and can issue an alarm if the tolerance is outside of the specified range. The reality is that board stretch has been accepted because there is some give in the process with larger (relatively speaking) components. But, things are getting really tight – as evidenced by our recent test board experience – and the give is giving way. With the tools we used, good alignment is certainly achievable, and frankly, it’s what will have to be done for sub-0.3mm CSPs and the like. You have to deal with the cards you’re dealt, and right now that means some board stretch. As I noted in a previous column, though, PCB manufacturers will have to solve the board stretch issue as the industry migrates to these smaller devices – and it’s not far off. Otherwise, we’ll be looking at processing singulated PCBs.

As far as alignment goes, the vast majority of manufacturers today are only doing x and y offsets, and for current technology, that should be satisfactory. But I caution anyone reading this column to brush up on their platform’s capabilities and understand how to use rotation and multiple fiducial capture. Without question, 0.25mm CSPs are on their way, and you don’t want to be nailing jelly to a wall.

Clive Ashmore is global applied process engineering manager at DEK International (dek.com); cashmore@dek.com. His column appears bimonthly.

Smaller component technologies on the horizon, and the mix of parts to be placed, will present severe demands on accurate solder paste deposition.

Read more ...

Stencil use leads to lower tension, and eventually misalignment. Is there a solution?

Anyone with even a modicum of understanding about the printing process knows that stencil (or screen) tension is integral to print integrity. While the amount of tension is important, what’s even more critical is that the proper tension is evenly distributed across the stencil. There is also some evidence that points to higher tension being more effective than lower tension, particularly for today’s finer-pitched devices and especially when there is an extremely high density of apertures. Take a stencil for one of today’s mobile phone printed circuit boards (PCB), for example. These stencils tend to have more holes than stencil, so tension is critical.

On average, tensions between 30 and 35 Newton are a good starting point for a properly tensioned stencil. If the tension changes over time – either from process use or post-process cleaning – the printing integrity will be affected. When apertures are filled, the board and the stencil come together like a sandwich. If the tension in any part of the stencil has diminished, as the print stroke begins, the stencil image moves and gets pushed away with the direction of the squeegee. As the apertures are being filled, there will be misalignment as the print stroke progresses and it becomes increasingly difficult to keep the print process in control.

When the board is released from the stencil, a well-tensioned stencil will produce a very controlled release. If the stencil has become baggy and less tense, the stencil will follow the board down with the table so, instead of a complete clean separation, some parts of the stencil will separate before others. In the high-density areas of the board – where there are many, many 0.4mm CSPs and hundreds of 0201s or 01005s – there is a large volume of solder paste that wants to stick on the apertures. This condition will tend to pull the stencil down, resulting in an uncontrolled release.

Traditionally, mesh mounted stencils have been the stencil architecture employed most frequently in electronics assembly. When using a metal mesh (as opposed to a polyester mesh) from which the stencil is suspended, extremely high tensions can be initially created. However, mesh mounted stencils tend to relax and lose tension as they are used and cleaned. Consider that the entire stencil is placed into the cleaning system that uses temperature and chemistry to clean off solder residues. Then, the stencil is dried with hot air. Cleaning and drying are inherently bad for the adhesive materials used to manufacture mesh mount stencils. This process results in varying coefficients of thermal expansion, which cannot only weaken the elasticity of the stencil and mesh, but can also cause the stencil image to shift. When processing fine-pitch devices, this is highly problematic.

So, what’s the solution? The best option would be to clean the foil only and preserve the integrity of the tension. This is precisely the idea behind many of the market’s frameless stencil tensioning systems. With these stencils, the foil is separate from the frame, which has many advantages. While some of these systems faced early challenges (operator injuries from sharp edges, for example), these obstacles have been overcome, and the popularity of frameless stencils has grown in recent years. There are many benefits to frameless stencil technology, including storage space savings, sustainability, lower costs over the long term and, most important, no loss of tension over time. The stencil foils are cleaned once removed from the frame, so there are no concerns about mesh or adhesive impacts. When placed into the frame, the foil is tensioned to the same level each time and, because there is no mesh to contend with, there is no loss of tension – even in high-volume manufacturing environments. In comparison, mesh mounted stencils used in high-volume processes need to be replaced an average of every two to four weeks.

In the past, frameless stencils provided tensions of 30 to 35 Newton, which was fine for standard SMT (0.5mm pitch and above) but not for today’s miniaturized devices. If using these systems for fine-pitch processes, a frameless stencil that can provide a tension of 40 Newton or greater is required for a robust process. Anyone considering a frameless stencil system needs to bear this in mind during the selection process.

The new challenges of miniaturization dictate now more than ever that stencil tension is consistent. Tighter pitches combined with thinner stencils and high-density apertures make stencil tension control and uniformity an increasingly critical parameter. In this case, tension is indeed a good thing.

Clive Ashmore is global applied process engineering manager at DEK International (dek.com); cashmore@dek.com. His column appears bimonthly.