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Andrew Vo

Best practices for prepping for test during layout.

Design for testability is as critical a service as design for manufacturability, particularly as printed circuit board assemblies shrink in size and become more densely populated. From a Lean perspective, strong DfT focus does three things: First, it can help with early identification of design flaws; second, it can help improve throughput by optimizing the time and test technician activities required to test the PCBA; finally, an optimized test strategy ensures greater test coverage, which helps minimize field failures and concomitant support costs.

As engineering resources have shrunk at original equipment manufacturers, so has development of robust test strategy. However, software resources for performing DfT analysis enable analysis and reporting to be performed quickly. Data are transferred directly from computer-aided design files.

Some of the most common issues found in SigmaTron International’s DfT analyses include: 

  • No termination of a single connection.
  • More than one connection to the circuit but no via to access to test.
  • Circuitry does not match layout design.

When these issues are caught early in the new product introduction process, they can be corrected with a design spin of the PCB layout.

From a Lean perspective, the better option is to incorporate a checklist of good DfT practices in the layout process. Some best practices include:

  • Each single connection should be terminated either pull-up or pull-down, depending on the internal ICs. When terminated correctly the circuit performs better, and there is less electrical noise during in-circuit test.
  • Even with multiple connections on the circuits, PCB layouts have very poor test accessibility if the PCB layout designer does not provide accessible vias. Unless the product incorporates RF or high-speed technology, the PCB designer should bring all multiple connections to test vias that are accessible from the bottom-side of the board.
  • When there is a mismatch between circuitry design and PCB layout, components can heat up or blow up when power is applied. Routinely checking this issue as part of the NPI process ensures the design can be corrected before damage occurs.

The goal of this contractor’s test strategy for products still in a new product development stage is to screen thoroughly enough to ensure the circuit designer will be able to power up first articles and test with no short or open circuits. A three-pronged inspection and test strategy is used in that process. Automated optical inspection is used to verify placement and polarity of all components on the PCB. X-ray is used to inspect all solder joints. Flying probe or ICT is used to test for shorts or opens, and bad components. The degree to which the board can be tested for shorts/opens depends on the level of accessibility provided by the PCB layout designer.

This approach of addressing issues as early in the NPI process as possible helps customers avoid production delays. This is particularly important when companies utilize third-party design resources or do not have a high level of in-house manufacturing and test expertise. For example, a startup company with a new consumer product recently went through an NPI process at our site. The product did not have good accessibility, and the contractor’s test engineering team put together a proposal on enhancing the test strategy. Following review of the CAD data, the test engineering team met with the customer’s PCB layout designer and provided recommendations for modifications to the layout that included better test point accessibility and corrections to circuitry routing issues. The team also found that the boundary scan tool the designer used had not ensured a proper JTAG connection. As a result, no power line was corrected to the JTAG. Once the assembly layout was changed, the test engineering team rechecked the layout and validated all issues were corrected. This improved test accessibility to 98% from 45%.

First articles were tested using a combination of ICT, AOI and 5DX x-ray to expand test coverage. The program has successfully ramped and is in volume production.

The result of early identification of the test issues made it easy to have the design respun without significantly impacting the product launch schedule. The earlier the test team can get involved, the more options there are to optimize test strategy, and the faster critical issues can be resolved.

From a Lean perspective, particularly with advanced technology product, involvement of the test engineering as early in the design process as possible pays significant dividends. In smaller products it is no longer possible to ensure high levels of test access through bed-of-nails testing. Use of JTAG and boundary scan helps address that issue, but only if the board layout accommodates that test strategy. Linking a contractor’s test engineering team with the product design team early minimizes the number of layout iterations required to develop manufacturable/testable products. Collaboration at this point also opens the door to discussion of a wide range of test strategy options and costs at a point where the design can easily be modified to best support the strategy.

Short-term benefits of this type of close collaboration among test engineering and the product design teams are optimized cost of test, higher levels of test coverage and excellent throughput. Longer term, the benefit may be a more cost-competitive product, plus greater levels of customer satisfaction and a lower cost of product support due to minimal field failures.

Andrew Vo is director of test engineering at SigmaTron International’s facility in Union City, CA (sigmatronintl.com); andrew.vo@sigmatronintl.com.

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