Will future developments in packaging and assembly be joint efforts?

When we speak of innovation, we are referring to something new, be it an idea, method or device. There is no question that the electronics industry has witnessed the introduction of many innovative products, but it is important to look inside these devices to see what packaging and assembly developments have made them possible. Given the manufacturing developments of the past, today’s question is, Where will the next innovations in assembly take place?

Great product innovations have improved our lives through better communication, computation and increased productivity. Improvements in high-performance computing that processes information faster and faster, anywhere and anytime, have been enabled not only by developments in silicon, but also by the ability to assemble and package integrated circuits in modules with multiple chips using the most advanced interconnect possible. In the past, technology advances in computing seemed only possible at large vertically integrated companies. But things changed with the mobile revolution.

What enabled mobile phones was not just clever silicon design, but also advanced packaging. Chip-scale packaging (CSP) enabled greater functionality in a smaller space: thin, light, small products that consumers could hold in palms and fit in pockets. The first packages were very small – almost the same size as the die – and developed in Japan by such companies such as Fujitsu, Hitachi Cable, Matsushita (now Panasonic), Mitsubishi, NEC, TI Japan, and Toshiba. Meanwhile, a US startup called Tessera introduced a CSP based on flex-circuit technology and called it µBGA.

The packages also had to be assembled on PCBs, typically boards with fine features that could be used to route the CSPs with small ball pitch (1.0mm or below). Microvia boards or buildup technology introduced in the 1990s were used for these products. At its inception, microvias represented one of the most important developments in the PCB industry in 35 years.1 IBM has received much credit for the buildup technology called Surface Laminar Circuit (SLC); however, many of today’s products use Matsushita’s Any Layer Interstitial Via Hole (ALIVH) board technology, which has been licensed around the world.

With small-form factor, low-profile consumer products in demand, an even smaller version – the wafer-level package (WLP) – was invented and ultimately adopted for smartphones and tablets.

Increased functionality has driven other innovative package designs. Package-on-package (PoP) is one of the fastest-growing developments in Amkor’s history. This 3D concept permits memory and logic devices to be packaged separately and tested, then assembled. A PoP can be found in every smartphone, many tablets, and other portable products.

What’s next. With the introduction of tablets, mobile computing and communication is being driven further. While today’s WLPs, PoPs and stacked die packages will remain popular, new versions of advanced packages are expected to emerge. The promise of 3D interconnect with through silicon vias (TSV) will dramatically improve the performance of mobile products. Companies that supply devices for wireless applications see 3D ICs with TSV as a potential solution to the requirements for increased processor performance, exploding bandwidth of data exchange between processors and memory, increasing power consumption for data access, limited power supply from battery, low cost, and miniaturization.2

Where does innovation take place? My iPhone box says Designed in California. What about the next generation of technology that will make the phone, tablet or whatever the next killer app is wow the consumer? And which company or country will be responsible? Will it be a 3D IC with TSV or some other technology? Will the innovation take place at the foundries? Will the major breakthroughs come from some vertically integrated company that makes memory and logic (Samsung)? Will this take place in the IDMs such as Intel, Qualcomm, or others? Will it take place at the OSATs such as Amkor, ASE, SPIL, or STATS ChipPAC? Or will some new assembly house enter the picture? Will it take place at Foxconn or Flextronics?

The concept of embedding die to create a small, thin package is a hot topic today. But this requires cooperation between substrate makers and assemblers. Is a new model for innovation emerging? In July, Multek announced the opening of its new Interconnect Technology Center in Silicon Valley. The center is focused on future technologies for the PCB industry, and part of its mission will be to identify industry gaps and trends that are emerging in areas including advanced material development, embedded components, and high density interconnect. Will the industry see new partnerships emerge such as the one announced by AT&S and TDK’s EPCOS division on embedded devices?

Innovation at the assembly level is likely to take a new shape. With the introduction of 3D ICs with TSVs, partnerships among the foundries, IDMs and OSATs will be necessary to satisfy the needs of the end-product designer. For embedded components, the PCB, substrate or module maker will need to cooperate with the device maker or assembler to achieve the new form factor. Cooperative innovation may become the new model for the industry.


1. R. W. Carpenter, “Will the Real Sequential Build-up Product Please Stand Up,” Circuitree, November 1996.
2. M. Nowak, “High Density Through Silicon Stacking,” IEEE International System Integration Conference Proceedings, 2009.

E. Jan Vardaman is president of TechSearch International (techsearchinc.com); jan@techsearchinc.com. Her column appears bimonthly.

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