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Thursday, 03 September 2009 18:29


"Bare Board Material Performance after Pb-Free Reflow”
Authors: Joe Smetana, Thilo Sack, Wayne Rothschild, Bill Birch and Kim Morton; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .Abstracts Icon
Abstract: The High Density Packaging Users Group completed an extensive study of 29 different bare board material and stack-up combinations and their associated performance after 6X Pb-free reflow at 260°C. Board design factors, specifically thickness, resin content and via pitch, play a major role in the assembly survivability and long-term reliability. The PCB assembly complexity and associated required thermal processes and temperatures to achieve proper assembly and rework also play a major role. Materials can no longer be specified only by Tg and be expected to survive reflow, much less be reliable long-term. Fabricator quality and plating quality are as or more important than with SnPb assembly. Specifying other material properties, such at Td, T260, CTE Z, etc., is helpful but insufficient in specifying materials for Pb-free assembly. A significant issue is the lack of correlation between supplier-reported material properties and the actual measured properties of the material on real boards. Internal delamination can occur on boards with no visible evidence that it has occurred. Data presented focuses on air-air thermal cycling, IST testing and material survivability after Pb-free assembly reflow. Test board design aspects, manufacturing processes, Weibull analysis, and failure analysis data are included. The impact of plated through-hole pitch on laminate integrity and how material properties relate to the results are discussed. (IPC Apex, March-April 2009)


"Assembly and Reliability Investigation of Package on Package”
Authors: Brian Roggeman and Michael Meilunas; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
Abstract: This paper discusses the results of several independent experiments designed to address the many aspects of successful PoP integration. Assembly through the use of inline stacking and pre-stacking was evaluated. Top package soldering was performed by dipping in either flux or paste. The warpage behavior of each level and the full module was characterized through simulated reflow using shadow moiré analysis. Warpage behavior was found to be a limiting factor in assembly yields. PoP assembly reliability was evaluated using drop/shock, vibration and thermal cycling. The level at which failure occurred depended on the location of the module on the PCB. Underfill was found to greatly enhance mechanical reliability; however, thermal cycling reliability decreased. (IPC Apex, March-April 2009)


"An Analytical Approach for the Design of Buried Capacitance PCBs”
Author: J. Lee Parker, Ph. D.; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
Abstract: A buried sheet capacitor is essentially a thin innerlayer. The core is composed of an organic material often reinforced with a woven glass structure. A classic example is FR-4. The laminate extends over the entire board and is essentially a very thin innerlayer. The copper weight is normally 1 oz., and the thickness of the dielectric typically is 0.002˝ or less. This work presents a systematic approach for deciding if a board design will be enhanced by inclusion of buried capacitance innerlayers. A procedure for estimating the potential financial impact is included. (IPC Apex, March-April 2009)


"Validated Test Method to Characterize and Quantify Pad Cratering Under BGA Pads on Printed Circuit Boards”
Authors: Mudasir Ahmad, Jennifer Burlingame and Cherif Guirguis; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
Abstract: Pb-free solder joints are stiffer than SnPb joints, and Pb-free compatible (phenolic-cured) PCB dielectric materials are more brittle than FR-4 (dicy-cured) PCB materials typically used for eutectic assembly. These factors, coupled with higher peak reflow temperatures used for Pb-free assemblies, could transfer more strain to the PCB dielectric structure, causing a cohesive failure underneath the BGA corner pads. The likelihood of pad cratering occurring in any given assembly depends on BGA package size, construction and surface finish – and PCB pad size, material and surface finish. Standard assembly level bend, shock and drop tests can be used to determine if the entire assembly can survive a given strain and strain-rate range without having any failures, but it is difficult to determine if failures occurred due to an unusually weak PCB dielectric/PCB pad size or a stiffer BGA package. In this study, an easy-to-implement test method to quantify the propensity for pad cratering in different PCB materials is presented. Gage repeatability and reproducibility studies to fully develop the test method were performed. Several different design variables, such as PCB material, resin content, solder alloy, number of reflows, pad size and shape were studied with a range of material sets. The test method was refined to develop a comparative metric that can be used to rank-order different PCB materials and pad size combinations. (IPC Apex, March-April 2009)

CIRCUITS ASSEMBLY provides abstracts from recent industry conferences and company white papers. With the amount of information increasing, our goal is to provide an added opportunity for readers to keep abreast of technology and business trends.

Last Updated on Wednesday, 09 September 2009 18:32


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