How Clean Are Plugged Microvias? Print E-mail
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Written by Terry Munson   
Monday, 30 June 2008 19:00

Not very. And the residues can affect circuit performance.

Process Doctor Microvia contamination from the fabrication process is not new, but is leading to a new appearance in immersion tin, silver and OSP boards. Besides microvias (holes with a 0.013" or smaller opening) with visible attacks on the metalization surface, we are seeing open or intermittent open cracked vias. These small openings are plugged on one side and function as a turned-up cup in a dishwasher. Wash and rinse water get inside and do not flush out easily, leaving corrosive residue.

Figure 1 shows an OSP process with good plugged vias below a BGA, which held sulfuric acid (H2SO4) residues from the etch process and tap water rinsing. The bare boards had plugged vias. As part of the fabrication process, the boards were subjected to an OSP process, which included sulfuric acid (as a microetch) and tap water cleaning. The boards were processed such that the plugs were always down (relative to gravity). We believe the sulfuric acid gets into the vias as part of the OSP coating process, and the subsequent tap water cleaning does not adequately remove the sulfate residues, especially for tall/narrow holes. The sulfates dry in place and, when later combined with either heat (preheat and wave solder) or water (from aqueous cleaning), the acid reforms at a significant concentration. The lower crack (Figure 1) was formed by liquid acid etching away copper. The upper crack was formed by acid vapors etching the copper. Because of the surface tension of water (especially tap water), and the closed nature of the capped via, there was no effective cleaning in those vias. Using a localized extraction system to assess just a couple vias revealed 18 to 27 µg/in2 of sulfate in these areas. The residue is trapped during the wet chemical fabrication processes, and when the boards are reflow-soldered, the chemicals (H2SO4) do as designed: attack and dissolve metal.


The second investigation showed the residue will outgas during reflow, leaving conductive and corrosive residue in and around the vias. Where sensitive circuits are present, we see stray voltage and attack of the via metalization. These areas of the vias (Figure 2) show visible attack of the surface metalization and affected circuit performance. The level of sulfate on these Ag-plated assemblies is 24 to 30 µg/in2 in a 0.1 in2 area of testing. The amount of ionic residue found in larger holes is much less; for example, a 0.030 in. hole shows 0.81 µg/in2 of sulfate residue (Figure 3).



When testing the total bare board or even assembly with a bag or bulk amount of ionic residue, these small via cups of residue get diluted by the volume of solution or surface area calculation. We need to see the cleanliness in a few vias to understand the pocket of contamination effect and determine control points needed.

Terry Munson is with Foresite Inc. (; This e-mail address is being protected from spambots. You need JavaScript enabled to view it . This column appears monthly.



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