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Thursday, 31 January 2008 19:00
Technical Abstracts Component Packaging

“BGA Coplanarity Reduction During the Ball Attach Process”

Author: Rick Lathrop; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .

Abstract: Solder ball array coplanarity due to package warpage in most cases has been greater than for leaded devices. In level 2 assembly, this coplanarity can translate into open or intermittent solder connections known as “head-in-pillow”, “ball-in-socket” or “ball-in-cup” (BIC) defects (named after their cross-sectional shape). These defects can escape test, x-ray and visual inspection. After post-assembly test, assemblies with BIC defects often fail with handling, thermal cycling or simply during shipment. Most of the BGA’s coplanarity stems from laminate warpage because of underfill and overmolding on the die side of the package. This paper investigates a novel technique of reducing final package coplanarity during the ball attach process by selectively varying the final ball diameter to localized package warp. The assumption is that the unique package topology on the ball side of the package is well understood. Quantitative measurement using high-res confocal measurements is presented for packages in the 1.27 to 0.5 mm pitch range. The methods described do not require new capital equipment or major retooling to implement. The majority of the value added is in a unique stencil design, implemented directly into the ball attach process if printed solder paste is used, or proactively by the solder-on-pad supplier. Design guidelines and predictions of coplanarity reductions possible at various ball diameters are detailed. Although the root cause of BGA coplanarity is not addressed, detailed methods for the level 1 assembler to reduce the effective coplanarity to the level 2 assembler are presented. (SMTA Pan Pacific Symposium, January 2008)


“Improvements to Through Silicon Vias, or TSVs”

Author: Phil Marcoux, This e-mail address is being protected from spambots. You need JavaScript enabled to view it .

Abstract: Through silicon vias, or TSVs, have received much press as the next significant interconnect from the IC to the outside world. The initial presentations have provided enthusiastic views of what TSVs can offer. However, as developers have spent time to develop and refine processes, the reality and difficulties of TSVs have appeared. Fortunately, improvements and alternatives to TSVs have emerged. This paper reports on these experiences from the point of view of a user and developer of these wafer-based interconnection processes. (SMTA Pan Pacific Symposium, January 2008)


Reliability

“Life-Test Statistics for Small Sample Sizes”

Author: Tom Clifford; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .

Abstract: Accelerated life tests (usually thermal-cycle) are increasingly necessary in microelectronics development and marketing, but are troublesome and expensive. The number of samples on test is known to be crucial, but important decisions often must be made based on testing only a few samples. This paper offers insight into the quality of tiny-N statistics, as well as guidance on testing and decisions involving life-tests of few samples. Examples and case histories are offered for test planning, as well as for interpretation of sales pitches. Recommendations include: Use intuitive metrics, not pretentious full-color curves; generate, report, and demand all data and metrics; the best metrics are F50 (central tendency), F.1 or F.01(early failures), and beta (a measure of breadth); never use the “first fail” as a metric of anything. (SMTA Pan Pacific Symposium, January 2008)


Solderability


“Impact of Soldering Atmosphere on Solder Joint Formation”

Authors: Ursula Marquez de Tino, Denis Barbini and Wesley Enroth; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .

Abstract: The 2007 iNEMI Roadmap identified increased use of nitrogen in reflow and wave soldering processes because of lower wetting forces of Pb-free solders. While flux chemistries evolve and improve to promote wetting of Pb-free alloys, it will take many iterations to get the desired results. Therefore, the use of nitrogen is unavoidable, at a significant cost increase. The Roadmap emphasized equipment manufacturers should reduce the amount of nitrogen consumption by using better low-volume inserting methods with a combination of advanced flux chemistries. This collaborative effort investigated different techniques that can significantly reduce nitrogen consumption without affecting final assembly quality. Studied was the use of alternative nitrogen supply method such as applying nitrogen on the reflow areas only, in combination with different oxygen ppm levels during reflow, and their impact on secondary wave soldering process of copper OSP PCBs. The results of this investigation provide the basis to develop next-generation reflow ovens. (SMTA Pan Pacific Symposium, January 2008)

Circuits Assembly provides abstracts of papers from recent industry conferences and company white papers. With the amount of information increasing, our goal is to provide an added opportunity for readers to keep abreast of technology and business trends.

 

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