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Written by Clive Ashmore   
Tuesday, 31 May 2011 23:15

The literature, plus testing at a high-volume EMS, supports new stencil coating technologies.

In one of my previous columns (“Sorting out Stencil Technology,” December 2011), I made reference to new nano stencil coatings and their impact on stencil performance in relation to cleaning and reduction of defects. For those who may have missed it, here’s a quick recap: Newly developed stencil nano coatings – either pre-applied at the stencil manufacturer or applied via a wipe-on formula at the manufacturing site – offer a fluxophobic capability that keeps flux (and the integrated metal particles) from bleeding past the aperture border during the print cycle. As one can imagine, limiting the amount of solder paste that can break into the stencil web helps reduce the required cleaning frequency.

While my past comments were well-founded, the results reported were from our internal testing and that of beta-site customers. Now, with several months in the field, there is even more evidence that stencil nano coatings are earning their keep, including a pair of articles in this publication.1,2 Recently, our company tested a wipe-on stencil nano coating at a large EMS firm that manufactures mobile communication devices in high-volume. For this particular product, the EMS had performed standard process engineering and optimized the assembly to the point where it was running within acceptable limits. But, it knew additional improvements were needed and changes to the process would be required. The challenge was to improve yield without increasing costs. The situation was as follows (which, incidentally, is something our company is seeing a lot of as we continue on our miniaturization trek): The EMS was experiencing some defects – namely, bridging and smear – largely as a result of a challenging design. The printed circuit boards had large CAN areas with a large, fine-pitch CSP smack in the middle of all the CANs, resulting in a stencil with a bit of a trampoline effect. The tension on the perimeter of the stencil was fine, but once all the large CAN apertures were cut, the CSP in the center of the stencil released slightly different because it was under different tension. The significant reduction of metal from the CAN apertures created a stencil with nonuniform tension. Because of this, the EMS was experiencing bridging and smearing and, to resolve the defects, was throwing in an understencil clean after every print.

Cleaning after every print is an out-of-control process because the print process never gets to its natural level. So, we set off to help alleviate this issue, reduce the defects and improve yield – all while not increasing cost – and, hopefully, reducing cost. We started with one line and a bunch of nervous process engineers. The EMS benchmarked the process with a run of close to 20,000 boards. Then, they applied a wipe-on stencil nano coating and slowly started to increase the number of prints between cleaning cycles. They went from one print to every other print, and the results were still acceptable. Nearly 20,000 boards were assembled, yet again with good results – excellent results, in fact, with a yield improvement. Cleaning frequency was then reduced to every three or four boards, and the EMS found that not only were they keeping the yield without increasing defects, they actually reduced the defects and, therefore, improved yield. Ultimately, a decision was made to stop at 10 boards between cleans, though it probably could have been pushed further. In the end, the EMS went from a 98.5% yield (a very hard number to improve on) to a yield of 99.8%, which is significant in high-volume terms. Not only were defects reduced and yield improved, but significant consumables costs were saved.

These coating technologies offer the printing process a little more scope. The reality is that we are trying to cram as many 0.4mm CSPs onto a board as we can and, to make it even more difficult, now embed them into heavily cut out areas with different release dynamics. It makes it very challenging to get a consistent good print, and stencil nano-coatings give assemblers just a little more latitude.

But, it’s not only about miniaturization. Stencil coatings help compensate for inconsistencies in PCB manufacturing. It’s not rare for boards to have solder mask 100 to 200 µm higher than the pad. Obviously, this isn’t great for gasketing when printing 100 µm-thick paste. If the solder mask is 200 µm thick, you are printing into a pocket because the stencil isn’t gasketing to the board, which can lead to bridging and smearing. Stencil coatings help keep the paste where you want it and prevent it from bleeding out into the stencil web, thus permitting environmental factors to be less than perfect and introducing far more capability into the process.
My advice is to give these stencil coatings a try. Whether you apply them yourself or source coated stencils from a supplier, the benefits are well worth the investment.

References

1. Ricky Bennett, Ph.D., “Nano-Coatings for Stencils,” CIRCUITS ASSEMBLY, January 2011.
2. Karl Seelig and Tim O’Neill, “Impact of Mesh Size and Stencil Technology on Deposition Volume,” CIRCUITS ASSEMBLY, March 2011.

Clive Ashmore is global applied process engineering manager at DEK International (dek.com); This e-mail address is being protected from spambots. You need JavaScript enabled to view it . His column appears bimonthly.

Last Updated on Wednesday, 01 June 2011 13:31
 

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