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Thursday, 03 June 2010 18:49

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Chip Assembly

“Complex Self-Assembled Patterns Using Sparse Commensurate Templates with Locally Varying Motifs”
Authors: Joel K. W. Yang, Yeon Sik Jung, Jae-Byum Chang, R. A. Mickiewicz, A. Alexander-Katz, C. A. Ross and Karl K. Berggren; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
Abstract: Here, we show that an array of carefully spaced and shaped posts, prepared by electron-beam patterning of an inorganic resist, can be used to template complex patterns in a cylindrical-morphology block copolymer. The authors use two distinct methods: making the post spacing commensurate with the equilibrium periodicity of the polymer, which controls the orientation of the linear features, and making local changes to the shape or distribution of the posts, which direct the formation of bends, junctions and other aperiodic features in specific locations. The first of these methods permits linear patterns to be directed by a sparse template that occupies only a few percent of the area of the final self-assembled pattern, while the second method can be used to selectively and locally template complex linear patterns. (Nature Nanotechnology, April 2010)

Embedded Components

“Industrial PCB Development using Embedded Passive & Active Discrete Chips Focused on Process and DfR”
Authors: M. Brizoux, A. Grivon, W. C. Maia Filho, E. Monier-Vinard, J. Stahr and M. Morianz; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
Abstract: This paper discusses aspects of the PCB embedding technology developed in the frame of the HERMES project (High density integration by Embedding chips for Reduced size Modules and Electronic Systems). This European-funded FP7 three-year research program targets to establish an industrial platform capable of producing PCBs with two layers of embedded components, including large die sizes. The embedded PCBs manufactured were populated with external SMD components on both sides to constitute complex high-end integrated modules able to withstand conventional repair operations and ensure a high-reliability. (IPC Apex, April 2010)

Organic Electronics

“Influence of Dielectric Surface Chemistry on the Microstructure and Carrier Mobility of an n-Type Organic Semiconductor”
Authors: Parul Dhagat, Hanna M. Haverinen, R. Joseph Kline, Youngsuk Jung, Daniel A. Fischer, Dean M. DeLongchamp, Ghassan E. Jabbour; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
Abstract: Organic electronics, use carbon-based materials that are intrinsically semiconductors. This paper examines the microstructure evolution of 3,4,9,10-perylene-tetracarboxylic bis-benzimidazole (PTCBI) thin films resulting from conditions imposed during film deposition. Modification of the silicon dioxide interface with a hydrophobic monolayer (octadecyltrichlorosilane (OTS-18)) alters the PTCBI growth habit by changing the unit cell contact plane. PTCBI films deposited on oxide surface have an orientation of (011), while films atop OTS-treated oxide surface have a preferred orientation of (001). The quality of the self-assembled monolayer does not appear to influence the PTCBI growth preference significantly, yet it enhances carrier mobility, suggesting that charge traps are adequately passivated due to uniform monolayer coverage. High-quality monolayers result in n-type carrier mobility values of 0.05 cm2V-1s-1. Increasing the substrate temperature during PTCBI film deposition correlates with an increase in mobility that is most significant for films deposited on an OTS-treated surface. (Advanced Functional Materials, Aug. 3, 2009)

Solder Joint Inspection

“Robust Automated Void Detection in Solder Balls and Joints”
Authors: Asaad F. Said, Bonnie L. Bennett, Lina J. Karam, and Jeff Pettinato; This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
Abstract: A robust, accurate and automatic void detection algorithm is proposed. The proposed method is able to detect voids with different sizes inside the solder balls, including the ones occluded by board components and under different brightness conditions. The proposed method consists of segmenting individual balls, extracting occluded balls and segmenting voids inside the solder balls. Segmentation of individual balls is achieved by using the proposed histogram and morphological-based segmentation method. A voting procedure is used to segment the occluded balls where the pixels inside the occluded area are checked to obtain candidate pixels representing the occluded joint’s or ball’s centroids. An independent edge-detection procedure is used to get candidate voids inside individual balls. Mathematical morphology operations are used to locate all possible valid voids and remove non-void areas. The proposed algorithm was applied to three different Intel products. Results were compared to results obtained by an automated algorithm in an existing state-of-the-art 2D x-ray inspection system, results obtained by trained operators from 2D x-ray images, and results obtained by trained operators from 3D CT scan images. The results (pre SMT solder balls) show the proposed method is capable of successfully locating all possible visible voids inside the solder ball, even ones missed using other methods, as well as those hard to see by the human eye. (IPC Apex, April 2010)

Last Updated on Monday, 07 June 2010 15:06
 

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