Features Articles
Since being named technical conference director for PCB West seven years ago, I have generally shied away from offering keynote addresses.
There are many reasons for my hesitancy, but primarily it’s because they seemed so out of place for a conference like PCB West. Since UP Media president Pete Waddell founded the show in 1992, its focus has always been on training. That sets it apart from the traditional research-driven test-and-report style events that populate this industry. Both have their place, but PCB West always has been about helping those in the trenches.
Keynotes, on the other hand, tend to fall in one of two categories. There are the rah-rah types, of course. These are the professional motivators: ex astronauts, generals, athletes. They tend to roll out the same old bromides, a takeoff on the theme of overcoming adversity. Audiences listen. They cheer. Their souls are saved. Then they go out and do the same things they’ve always done.
CT takes time, but can virtually microsection and analyze any plane in an entire sample.
2-D offline x-ray inspection of electronics is directly analogous to 2-D medical x-ray imaging, the only difference being image magnification is required to see the much smaller features within electronic devices and boards. (Also, the sample doesn’t talk back!) Medical x-ray imaging also offers CT scanning (also known as 3-D x-ray or computer tomography or CAT scans), and the same technique is available for electronics analysis. From Greek, tomography means writing slices.
CT provides a 3-D density map model of the sample from which virtual 2-D x-ray slices can be taken and examined in any plane within the model. Consider it like being able to take virtual microsections anywhere, at any angle and as often and repeatedly as desired through the sample without having to cut, pot, polish, optically image, repolish, re-image, etc., as when making a traditional microsection. 3-D representations of the sample may also be created and virtually sliced (FIGURES 1 to 3).
Reducing labor content and defects in SMT manufacturing.
“I need to reduce overhead 40%, while still manufacturing at the same capacity, to stay competitive in China.”
That is how a businessman from Hong Kong who owns a contract manufacturing plant in China recently explained his most urgent business goal to me. He wanted smart factory software to help him achieve that goal in the shortest time possible.
Days of cheap labor and being able to throw more people at every problem on the electronics manufacturing shop floor are long gone.
That has been the case in Western countries for some time, and is becoming the norm in China as well. Plants are being moved to yet another cheap labor country, while companies that stay in China are consolidating operations. And customers keep demanding lower cost. To stay competitive, electronics assembly companies must reduce labor cost and respond dynamically to skilled labor shortages.
Corrective measures include adjusting the solder paste chemistry and reflow profile.
Voids in solder joints are not uncommon after reflow soldering and can be easily detected using x-ray. Champagne voiding is related to hundreds of very small voids seen at the solder joint-to-surface pad interface (FIGURE 1). When they occur in reflow voiding, the cause may be related to the solder paste and profile. The voids will be seen in the bulk of the solder joint or near the top of the joint at the component pad interface.
Many flex designs perform well with panel plating for countless bend-to-install applications.
When copper-plating vias and through-holes, there are several process options in the PCB manufacturer’s toolbox. Typically, they fall into three buckets: panel plating, pattern plating and button plating.
Panel plating (FIGURE 1) means the entire panel surface and all the holes will be electrolytic copper plated to the full plating thickness requirement. The etch process will etch down through the base and plated copper, leaving a pattern with features comprised of both the base and plated copper. Pattern plating is accomplished by creating a pattern of all the circuitry on the two exposed layers with a plating resist, then plating up the pattern of the outer layers. After stripping the resist, the etch process will etch away the base copper between all the plated patterns, leaving a pattern with features comprised of both the base and plated copper. Panel and pattern plating essentially result in the same end-product. For this discussion, we will compare button plating and panel plating.
New industries outside electronics may have different products, but share a familiar approach.
Last February, at the same time and place as IPC Apex Expo, maybe you noticed the signs for something called “Traffic & Conversion 2018.” Perhaps it was my age, or perhaps just naivety, but I just assumed the event dealt with roadway equipment used to manage vehicular traffic. Boy was I wrong.
Had I focused on the attendees, I would have immediately noticed that virtually all of them were young and tethered to their iPads. Over their morning coffee at Starbucks, there was no conversation or early morning banter. Instead, everyone was in a trance, staring at their screens. At night, the same youthful attendees held court at the bar, laughing and networking. During a conversation with one, I finally learned what the group was all about. “Traffic & Conversion” was really an annual pilgrimage by data geeks to learn the latest trends, technology and methods employed in the world of “data mining.”
