News
Cookson Electronics Assembly Materials (CEAM, Jersey City, NY) has introduced a new dulling flux technology, ALPHA EF-9301. The product is compatible with both tin/lead and lead-free processes and is designed to help manufacturers meet environmental regulations without sacrificing productivity.
Tested under real-world conditions, the flux was shown to deliver higher first pass yields, more throughputs and require less rework than competitors. It reduces bridging on connectors and bottom side components and provides superior hole filling. Additionally, it minimizes solderballing, significantly reducing board handling time. The flux creates smooth, fully dull solder joints, easing the visual inspection process. It is designed for both spray and foam applications, eliminating the need for investment in additional equipment.
CEAM has also announced the worldwide availability of ALPHA OM-338, an ultra fine lead-free solder paste. The no-clean solder paste is designed for a broad range of applications and is formulated to minimize the transition concerns from tin/lead to lead-free processes. It yields print capability performance across various board designs and is ideally suited for ultra fine feature and high throughput applications.
The paste provides voiding resistance and maximizes reflow yields across a range of thermal profiles. Full alloy coalescence can be achieved at circular dimensions as small as 0.25 mm. Use of the paste results in print consistency and rapid cycle times. It can be applied at print speeds of up to 200 mm/sec. The high performance of the solder paste increases plant efficiency, increases yield and reduces rework requirements. It meets the highest IPC voiding performance classification and is reliable, ensuring product longevity. The paste is halide-free and compatible with either nitrogen or air reflow processing.
CEAM has also introduced ALPHA Vaculoy SACX307 lead-free wave solder alloy, which will be available worldwide through Cookson's global distribution network. The alloy delivers high yield and fast throughput, while meeting the strict lead-free environmental mandates.
Its fast wetting speed delivers improved solderability, outperforming all Sn/Cu based alloys. It provides excellent drainage and minimizes bridging defects. The alloy creates strong, mechanically sound joints with long-term reliability. The solder minimizes dross generation, resulting in low process maintenance and reduced product waste.
The process window supports the use of a wide range of flux technologies.
CEAM, a Cookson Electronics company, develops, manufactures and sells materials used in the electronics assembly process. CEAM supplies a full line of solder paste, stencils, squeegee blades, stencil and printed circuit board (PCB) cleaners, bar solder, cored wire solder, wave soldering fluxes and surface-mount device adhesives.
Copyright 2004, UP Media Group. All rights reserved.
As attendance totals indicate, the first co-located IPC SMEMA Council's APEX/IPC Printed Circuits Expo/IPC Designers Summit exhibition and conference, held Feb. 24-26 in Anaheim, CA, proved to be a wise investment for the show's exhibitors. IPC (Northbrook, IL) announced today that the attendance increased 8% over last year, from a combined exhibition total of 5,300 in 2003 to 5,700 attendees this year. Additionally, the co-location increased traffic at both shows, with 60% of attendees indicating they would take part in the offerings of both the APEX and Expo events.
The three-day event attracted 10,200 total visitors (attendees and exhibitors) to the Anaheim Convention Center, which featured 480 companies covering more than 154,350 sq. ft. of exhibit space. The professional development courses welcomed nearly 1,300 participants and 1,100 people attended the technical conference. Also, this year's Interconnect Manufacturing Services (IMS) / Printed Circuit Board (PCB) Presidents Management and Electronics Manufacturing Services (EMS) Management Council meetings continued to draw strong numbers, with a total of 105 senior level managers in attendance.
Wendy Stallman, corporate communications manager at Electro Scientific Industries, concurred with McGuirk, "The quality of attendance at this year's event shows that the market is turning around. It is refreshing to see that people are beginning to make purchases again for existing equipment and that they are beginning to embrace new process technologies, such as embedded passives."
Attendee Mark Basich, manufacturing manager at Rauland Borg, siad, "The show was highly informative this year. It was well organized and having the shows at the same time allowed us to reduce the amount of time and energy we spent in previous years to meet and greet others in the industry."
Next year's co-located show will take place Feb. 22-24, 2005 in the same location.
IPC also recognized this year's best U.S. and international papers at its co-located exhibition and conference. Each winning paper received a $1,000 honorarium and a commemorative plaque from IPC.
"Tin Whisker Growth—Substrate Effect Understanding CTE Mismatch and IMC Formation" received the Best U.S. Paper award. Cookson Electronics' Dr. Yun Zhang, Chonglun Fan, Dr. Chen Xu, Oscar Khaselev and Dr. Joseph Abys co-authored the winning paper.
In addition, IPC recognized the following papers as Honorable Mentions: "Mechanical Bending Technique for Determining CSP Design and Assembly Weaknesses," by Mark R. Larsen and Dr. Ian R. Harvey from the University of Utah, David Turner of Inovar, Inc., Brent Porter of Bourns Electronics and James Ortowski from EDO Ceramics; and "Design of Experiment in Micro-Via Thermal Fatigue Test," by Dr. Tse Eric Wong, Harold S. Fenger and Dr. Isaac C. Chen of Raytheon Electronic Systems.
The Martin L. Barton Best International Paper Award, named for former APEX Technical Conference Director Martin Barton, was awarded to "Phosphorus in Electroless Nickel Layers—Curse or Blessing." The paper was authored by Atotech Deutschland GmbH's Sven Lamprecht and Hans Jurgen Schreier, as well as Kuldip Johal and Hugh Roberts of Atotech USA.
IPC recognized "The Effect of Thermal Loaded Bend Test on the Solder Joint Reliability," co-authored by Yuanze University Taiwan's Dr. Yeongshu Chen, C.S. Wang and C.H. Chen, as well as Solectron Corp.'s Dr. Aichyun Shiah, with an Honorable Mention for this international paper.
Copies of the winning papers are included in the 2004 Technical Conference Proceedings. They will also be published in the IPC's Review, a monthly publication distributed to IPC members.
Copyright 2004, UP Media Group. All rights reserved.
A new report, The Chinese Challenge, Intellectual Property (IP) in China Manufacturing and Markets, will be released by consulting firm Technology Forecasters Inc. (TFI, Alameda, CA) on March, 22. The report will include comprehensive tactics for protecting and defending electronics IP in China.
The Chinese Challenge presents up-to-date and thorough research on crafting a broad, multilayered IP protection plan for electronics products made or sold in China. The report is the result of interviews with engineers and managers from name-brand and contract-manufacturing electronics companies, as well as discussions with industry experts, trade associations and U.S. and Chinese government officials.
One of the major contentions of the report is that protection of electronics IP in China operations is more than a legal problem. The report focuses on production policies to minimize loss of control over IP, supply chain systems to guarantee quality inputs, as well as technical fixes to track products and support product redesign, making copying more difficult. Based on a review of tactics and research, the report offers an Electronics IP Checklist with cost factors, effectiveness and advisability.
This report is authored by TFI associate Clive Jones, economist and managing director of Economic Data Resources, with the assistance of Ting Liu.
According to Jones, "China offers tremendous cost savings, but there can be tradeoffs against future market share. Companies need a range of tactics to check or slow down the diffusion of valuable IP to Chinese competitors."
Two major groups of IP violators exist: smaller groups of counterfeiters and black marketers, and task groups in larger Chinese electronics companies. The latter group currently operates mostly below the radar. The smaller operations are responsible for most of the cases identified to date. They assemble from a combination of sources: authentic or at least grey market, black market, counterfeit and quality rejects. Their efforts are largely directed at simpler electronics products and supplies, although they have tried their hand at assembling systems like computer servers. Jones points out that "threats from larger companies are also very real, as witnessed by the existence of 'departments of reverse engineering' in some of the larger Chinese electronics concerns."
Table 1
Comparing Patents in China and U.S.
|
China Patents |
US Patents |
|
First to file |
First to invent |
|
Patents of invention (20 yeas) |
Utility patents (20 years) |
|
Industrial design patents (10 years) |
Design patents (14 years) |
|
Utility model patents (10 years) |
N/A |
|
N/A |
Plant (biological) patents (14 years) |
|
Criteria: novelty, inventiveness, practical applicability |
Criteria: non-obviousness, innovative |
|
Maintenance fees paid annually |
Maintenance fees paid 3.5, 5.5, and 11.5 years after issue |
|
Chinese agent, licensed by the State Intellectual Property Office, required for application |
Applicant can file |
To order the report, contact TFI's Eric Miscoll: (817) 488-9456; email: emiscoll@techforecasters.com.
Copyright 2004, UP Media Group. All rights reserved.
The International Reliability Physics Symposium (IRPS) has announced that Dr. Hans Stork, chief technology officer of Texas Instruments, will be the keynote speaker at IRPS 2004. The 42nd annual symposium for the scientific exploration of microelectronic reliability will take place April 25-29, at the Hyatt Regency Phoenix at Civic Plaza, Phoenix, AZ.
Dr. Stork, who was recently named CTO after serving as senior vice president of Silicon Technology Development at TI, will discuss "Reliability Challenges of sub 100nm-CMOS SoC."
Other highlights of the symposium will include technical sessions featuring the largest number of papers submitted and accepted in IRPS history. The two day tutorial series on reliability engineering for upcoming professionals features sessions on Future CMOS, Gate Dilelectrics, Low K/Cu Interconnects, RF/MMIC Reliability, Failure Analysis, General Reliability, Design Practices, ESD, High K Dielectric, NBTI and SER. The conference will also feature a poster session, a half-day Reliability-Year-In-Review seminar and a technically oriented, hands-on exhibit that will allow attendees to test and evaluate state of the art reliability analysis equipment.
The three-day technical program kicks off with Novel Transistor Reliability Findings, followed by sessions on transistors, back-end integration, gate dielectrics (SIO2 and High-K), latchup, products and circuits, memory, interconnects, MEMS, SER/SEU,ESD, back-end dielectrics and failure analysis.
Dr. Stork joined TI in 2001 from Hewlett-Packard, where he served as director of the Internet systems and storage lab at HP Laboratories, and earlier as the director of the ULSI research lab.
Dr. Stork has written or co-authored approximately 90 papers and holds five patents. He was elected IEEE Fellow in 1994 for his contributions to SiGe devices and technology and is also a fellow member of the IEEE Electron Devices Society, where he has served on and chaired a number of committees.
Dr. Stork joined the Sematech board of directors in 2002 after serving for several years on the organization's executive technical advisory board. He also has been a board member of the Semiconductor Research Corp. since 1999 and serves on the Semiconductor Industry Association's (SIA) technology strategy committee. Additionally, he served as a technical advisor to government efforts on high-performance computing benchmarks and the national security issues emerging from Internet computing.
Copyright 2004, UP Media Group. All rights reserved.
During the run-up to the change to lead-free solders by July 2006, a number of end users have expressed concerns about the reliability of soldered joints formed by mixtures of tin/lead (SnPb) and lead-free materials. These will arise when lead-free components are soldered using SnPb alloys, something already happening in many production lines, and later when SnPb components are soldered with lead-free alloys. The latter issue may be a significant problem for companies that have had to invest in lifetime purchase of components. Several workers have already published information that suggests that small levels of lead contamination in lead-free joints can significantly reduce joint performance.
Many of those concerned end-users approached National Physical Laboratory (NPL, Teddington, UK) to assist with clarification of any reliability issues during the transition period. A consortium of 16 contributing companies was formed with a work program. The work will cover reliability assessment of lead-free joints to SnPb components; reliability assessment of SnPb joints to lead-free components; evaluation of hot-peel strength of lead-contaminated lead-free joints; and applicability of lead indicator kits for paints for recognition of lead-containing components
The work, lead by Martin Wickham, is underway and results are expected in the next 12 months.
Participating partners include:
Aeroflex International Ltd.
AMS Space UK
BAE SYSTEMS (Operations) Ltd.
Celestica Ltd.
Department of Trade & Industry
Dolby Laboratories Inc.
Eurotherm Ltd.
Goodrich Engine Control Systems
Hansatech Group
National Physical Laboratory
Robert Bosch GmbH
Rolls Royce Naval Marine
TRW Automotive
Thales Missile Electronics Ltd.
For more information please contact Dr. Chris Hunt: +44(0)20 8943 7027; email: chris.hunt@npl.co.uk.
Copyright 2004, UP Media Groups. All rights reserved.
Concoat Ltd. (Fleet, UK) has engineered a water-based conformal coating addition to its Humiseal range that can protect electronics assemblies at temperature extremes beyond the capabilities of existing resin-based alternatives. The performance characteristics of Humiseal 1H20 stem from a new water-based chemical formulation that was engineered by Concoat and took over a year of research and development to produce.
"1H20 is currently undergoing qualification testing between -65°C and +185°C," said Concoat's technical director, David Greenman. "Because the top end figure is at least 50°C higher than conventional resin materials, this product will be especially relevant to the automotive industry where upper performance limits are ideally rated at 180°C for engine bay electronics."
As water-based coatings, the series is also environment-friendly to meet with the drive in Europe to reduce volatile organic compounds (VOCs).
Concoat's chief chemist Phil Kinner, said, "The coating is both safe and easy-to-use, it has a superior 8kV breakdown voltage that is higher than conventional resin, it is extremely flexible and offers excellent chemical and mar resistance, and is repairable. And by being non-hazardous and low odor, it greatly reduces the demands on fume extraction equipment."
Managing director Graham Naisbitt said, "It also meets the growing demand for higher performance conformal coating materials capable of protecting modern printed circuit boards (PCBs) that exploit ever greater packaging densities allied with reduced conductor widths and spacings that are now being used in increasingly hostile operating environments."
1H20 AR7 Par 2 is qualified to MIL-I-46058C and IPC CC-830B. UR3 meets requirements for IPC-CC-830B and UR4 MIL-I and CC-830-B are pending.
Copyright 2004, UP Media Group. All rights reserved.
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